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Semiconductor Processing and Integrated Circuits Part 10: Process and Device Evaluation

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Semiconductor Processing and Integrated Circuits Part 10: Process and Device Evaluation

Process and Device Evaluation Procedures in Semiconductor Processing

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This is Glew Engineering’s 10th installment in the blog series disussing Integrated Circuits (IC)s and Semiconductor Processing; today’s blog will be addressing process and device evaulation.  These articles have been written for those that are not technical specialists in the semiconductor field.

Every step during semiconductor processing has a strict set of equipment and processing parameters that are tightly controlled. After every significant process step, there is an evaluation of the results on the wafer or a test wafer. Test wafers, or blank wafers, are often used since some tests are destructive. Various measurements done measure the direct effect of some of the processes on the wafer. Other tests measure the physical parameters, while a third group of tests measure contamination in and on the wafer. Tests and measurement methods have changed and become come complex along with the levels of integration and smaller image sizes. Below we will review some of the measurements taken during the evaluation process.

Wafer Electrical Measurements

Resistivity Measurements

When dopants are added to the wafer during crystal growth and the doping processes, the electrical characteristics of the wafer are changed. The altered parameter is the wafer’s resistivity, which measures the material’s specific resistance to the flow of electrons. Since adding dopants to a wafer will change its resistivity, measurement of resistivity is an indirect measure of the amount of dopants added. The parameters of resistance, voltage, and current are governed by Ohm’s law and is mathematically represented below:

R = V/I = (p)L/A = (p)L/(WxD)

R = resistance V = voltage I = current p = resistivity of sample

L = length of sample A = cross-sectional area of sample

W = width of sample D = depth of sample

Layer Thickness Measurements

Color

Silicon dioxide and silicon nitride layers show different colors on the wafer. The color shown is a function of three factors. One, the index of refraction, is a property of the transparent film material. The second factor is the viewing angle, and the third is the thickness of the film. The color of the transparent film becomes an indication of the thickness when the nature of the viewing light and the viewing angle are specified. As the film gets thicker, the color changes in a specific sequence and then repeats itself. Each repetition of color is called an order.

Fringes

When the color order is not known, a fringe-counting technique can be used. A test wafer’s edge can be dipped in hydrofluoric acid, leaving the oxide exposed to view after a few seconds. Viewed under white light, colored fridges are formed between the wafer surface and the top of the film. The repeated sequence of colors can be seen, allowing for the order to be determined. Monochromatic light provides an even more accurate fringe-count. Where white light is polychromatic, monochromatic light consists of only one color. When a sample is viewed under a microscope with monochromatic light, the fringes appear as alternating, evenly spaced black and white stripes with each fringe separation representing a specific vertical distance. The fringes are counted and multiplied by a correction factor to determine thickness. The correction factor is determined by the wavelength of the monochromatic light used.

Junction Depth

The junction depth is a very important parameter and is measured after each of the doping steps. The measurement methods used to determine junction depth is done off-line, meaning that test wafers or device wafers must be taken to a measurement station or laboratory designed for measurements.

The traditional method of junction depth measurement is by the groove and stain technique. Grooving is a mechanical method of exposing the junction for viewing and measurement from the horizontal plane. Since the junction itself is not visible to the naked eye, two techniques called junction delineation are used to make it visible. The first technique, the etch technique, starts with the placement of a drop of hydrofluoric acid and water mixture over the junction. A heat lamp is directed onto the exposed junction, and the heat and light cause holes or electrons to flow in each region. The etch rate of the acid and water mixture is higher on the N-type region, making it appear darker. The second technique is electrolytic staining. A mixture containing copper is dropped on the exposed junction and again a heat lamp is applied. Essentially, a battery is formed, with the poles of the junction being the poles of the battery and the copper solution being the electrolytic connection. After exposure and delineation of the junction, the depth is measured. Various methods can be used including optical interferences and scanning electron microscopes (SEMs).

As semiconductors have become more complex, precise testing and analysis is even more essential to ensure the process is functioning properly.

We hope you enjoyed this brief review on process and device evaluation.  Check back next week to see our next installment of Semiconductor Processing and Integrated Circuits.  If you would like to read more on this topic feel free to click the links below.

Semiconductor Processing and Integrated Circuits Part 9

Semiconductor Processing and Integrated Circuits Part 8

Van Zant, P. (2000). Microchip fabrication, a practical guid to semiconductor processing. (4th ed.). New York, NY: McGraw-Hill.

By | 2016-12-15T22:25:22+00:00 May 9th, 2014|Mechanical Engineering, Semiconductor|0 Comments

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