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EDA Methodology: SKILL program lists output for each net in schematic

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EDA Methodology: SKILL program lists output for each net in schematic

We have attached a SKILL program which will output the information on each net in a schematic.  It will give the instances, pins and cells to which it is connected. Let us know what you think. This sort of program can be very useful to the electrical engineering working in the field of semiconductor design, utilizing electronic design automation, EDA.  Glew Engineering can help maximize the investiment in your compan’s EDA workstations by helping with your EDA methodology setup and infrastructure. By providing tools that can make your engineers more efficient and EDA software more efficient, this sort of help can pay for itself quickly.

The cost of the EDA software, engineering workstation, and the electrical engineer can be rather high.  It is important to keep them as efficient as possible.  Glew Engineering Consulting’s experts in EDA methodology can assist with your CAD EDA systems: Cadence(TM), Synopsys(TM), Mentor Graphics (TM) and more.

Let Glew Engineering help with your EDA Methodology Set Up:

  •  Environment
  •  PDK
  •  Libraries
  •  Netlisting
  •  Scripts/Programs – SKILL, Perl, Ocean
  •  Project Structure

Infrastructure:

  •  Software Installation
  •  License Management
  •  LSF Management
  •  Revision Control Setup

The SKILL program is below:

foreach( net cv~>nets

foreach( terminal net~>allInstTerms

termInst=terminal~>inst~>name;

termLib=terminal~>inst~>libName;

termCell=terminal~>inst~>cellName;

termName=terminal~>name;

termNet=,net~>name;

printf(“INST:%s LIB:%s CELL:%s TERM:%s NET:%s

“,termInst,termLib,termCell,termName,termNet);

)

)

 

By | 2016-02-12T11:13:20+00:00 June 8th, 2011|Mechanical Engineering, Semiconductor|0 Comments

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